A Brief History of RISC (circa 2001)

In the late 1950s, faced with the need to rationalize it's computer product lines, IBM instituted a research program having the objective of creating a range of software compatible computers that would also capture its existing software investments. The result, introduced on April 7, 1964 was the System/360, the first commercially available microprogrammed computer architecture (latter to become known as complex instruction set computer, or CISC architecture). The success of System/360 resulted in CISC architectures dominating computer, and later microprocessor, design for two decades.

However, the ability to incorporate any instruction which could be microprogrammed turned out to be a mixed blessing. During the mid-1970s, improved performance measurement tools demonstrated that the execution of most application programs on CISC-based systems was dominated by a few simple instructions, and the complex ones were seldom used. As a result, in October 1975 the project was initiated at IBM's Watson Research Center which, four years later gave birth to a 32-bit RISC microprocessor named for the building in which it was developed. In the immortal words of Joel Birnbaum, the first leader of the 801 project and later designer of the PA-RISC architecture: "Engineers had guessed that computers needed numerous complex instructions in order to work efficiently. It was a bad guess. That kind of design produced machines that were not only ornate, but baroque - even rococo."

The 801 was never commercialized, but a derivative single-chip implementation, the Research/Office Products Microprocessor (ROMP) was used in IBM's first production RISC system, the PC RT (introduced, like the first PA-RISC system, in January 1986), and was the progenitor of today's RISC processors. Several start-up server companies, notably Ridge Computer (July 1983), Pyramid Technology (October 1983), and Computer Consoles (December 1984) took advantage of the availability of UNIX (which meant that a C compiler was all that was needed to obtain an OS and applications) beat IBM and HP to market with RISC-based systems, but lacked the staying power of their larger competitors once the latter caught on to the benefits of UNIX (a winnowing process which is currently underway again with Linux).

Meanwhile, RISC had caught the attention of the academic community, principally at Stanford, which followed the IBM example of relying on compiler optimization and pipeline efficiency and produced what became the MIPS architecture, and Berkeley, which focused on minimizing inherently slow calls to external memory with a register rich architecture adopted in 1987 by Sun Microsystems. By 1988, RISC processors had taken over the high-end of the workstation market from the Motorola 68000 and within a few years dominated the server market too. Today, RISC cores are found at the heart of every workstation and server microprocessor, although many (notably Intel's IA products and IBM's zSeries eServers) disguise the fact rather well.

Merchant RISC Microprocessor Shipments (1000s)

	thru
	1994	1995	1996	1997	1998	1999	2000	2001
ARM/StrongARM	2,170	2,100	4,200	9,800	50,400	152,000	414,000	402,000
MIPS Rxx00	3,254	5,500	19,200	48,000	53,200	57,000	62,800	62,000
Hitachi SH	2,800	14,000	18,300	23,800	26,000	33,000	50,000	45,000
POWER/PowerPC	2,090	3,300	4,300	3,800	6,800	8,300	18,800	23,000
Total	30,499	33,830	58,480	98,220	149,080	262,820	556,800	538,860

Source: Andrew Allison

During the late 1980s and early 1990s, RISC processors began to displace CISC in the embedded applications which account for almost all microprocessor volume, and by the end of the decade market consolidation was well under way (see table above). MIPS was the volume leader through 1998 thanks to it's Nintendo game win, ARM took over rather decisively in 1999 thanks to cell phone usage, and the only one of the top four architectures to increase unit volume in 2001 was PowerPC. However, all is not quite what it seems: the reality is that the market is bifurcating into a low-power segment dominated by ARM, and a high-performance segment which will be fought over by Intel's XScale (formerly StrongARM), which also increased unit volume, albeit on a relatively small base, last year, and the PowerPC architecture. The implications of this for the remaining RISC architectures, SPARC and SH in particular, are a bit grim.